12 November, 2015. The Axion-CL uses BitFlow’s brand new PCIe Gen 2.0 platform, first designed for the CYton-CXP.
The Virtual Frame Grabber
The Axion supports up to two cameras. In dual camera mode, the board looks to Windows and application software like two completely independent frame grabbers. This simplifies the setup for multiple camera as each camera is really treated separately. Of course, the cameras can be internally synchronized if needed, but the can also run completely independently. The two cameras do not have to be the same resolution, frame rate, trigger mode or even tap format.
The StreamSync system consists of an Acquisition Engine and a Buffer Manager. The StreamSync system was first released on the Cyton-CXP and is a departure from previous BitFlow frame grabbers. The StreamSync system is a start-from-scratch complete redesign of the acquisition and DMA parts of a frame grabber. BitFlow used it years of experience in this area to design a next generation, super efficient capture system.
- Efficient support for variable sized images with fast context switches between frames
- Per frame control of acquisition properties (AOI specifically)
- Hardware control of image sequencing
- Enhanced debug capabilities
- Efficient support for on-demand buffer allocation (Genicam model)
- Gracefully recovery from dropped packets (either on the input side or the DMA side)
PCI Express Gen 2.0 Interface
The Cyton-CXP has a Gen 2.0 x8 PCI Express bus interface. The Gen 2.0 PCIe bus doubles the data rate of the Gen 1.0 bus while using the same footprint and connectors. The Cyton-CXP is fully backwards compatible with Gen 1.0 motherboards, though the data rate will be halved. However, Gen 2.0 motherboards have been shipping for a few years and will be the norm on almost all motherboards looking forward. The board will work in any slot that it fits in. This means not only x16 and x8 slots, but also, as is becoming the trend, x4 and x1 slots that use x16 connectors. Performance will be degraded in x1 and x4 slots, but the board will work fine in applications that don’t require maximum data rate.
Powerful Camera Configuration Files
Unlike previous BitFlow products, the Gen 2 products use an XML base camera configuration file. These files can be edited in any text editor. The file format is fully documented (see the downloads page). The XML file format is unique in that very few items are needed in order to get the board up and running with a given camera, which still supporting a rich set of tokens for very customized support of the board and/or camera. The XML camera files also support multiple modes for a given camera. This simplifies file management as only one file is needed for a particular make/model of a camera. All of its modes are supported internally by the token in the XML file.
Camera Control and I/O
I/O signals can be routed to/from many internal and external destinations, the flexibility of the routing is unprecedented in the industry. In addition, there are separate hardware I/O signals which can be connected to/from external source. Finally each CL camera has a full set of these signals which can be run independently. The Axion-CL board, as with our past interface products, supports not only simple triggering modes but also complicated, application-specific triggering and control interactions with your hardware environment.
Adding the Axion-CL to your application is simple with our SDK, which supports both 32-bit and 64-bit operating systems. Applications can be developed using C/C++/.NET and our sophisticated buffer management APIs. In addition, free drivers can be download from our web site for most 3rd party machine vision packages. The Cyton models are software compatible with each other, as well as with all the other current BitFlow frame grabbers. This makes migrating applications from Camera Link or analog to CXP simple and quick.